- Finished Vector Tests (test_vector.h)
This commit is contained in:
@@ -429,9 +429,9 @@ inline void fennec_test_math_vector()
|
||||
|
||||
|
||||
|
||||
fennec_test_section("boolean operations");
|
||||
fennec_test_section("bitwise operations");
|
||||
|
||||
fennec_test_spacer(1);
|
||||
fennec_test_spacer(1); // bitwise and ==============================================================================
|
||||
|
||||
fennec_test_run(0b0101 & ivec2(0b0001, 0b0010), ivec2(0b0001, 0b0000));
|
||||
fennec_test_run(0b0101 & ivec3(0b0001, 0b0010, 0b0011), ivec3(0b0001, 0b0000, 0b0001));
|
||||
@@ -462,18 +462,132 @@ inline void fennec_test_math_vector()
|
||||
fennec_test_run(([]() -> ivec4 { ivec4 v(0b0001, 0b0010, 0b0011, 0b0100); return v &= ivec4(0b1000, 0b0100, 0b1100, 0b0010); }()), ivec4(0b0000));
|
||||
|
||||
|
||||
fennec_test_spacer(2);
|
||||
fennec_test_spacer(2); // bitwise or ===============================================================================
|
||||
|
||||
|
||||
fennec_test_run(ivec2(0b0001, 0b0010) & ivec2(0b1000, 0b0100), ivec2(0b0000));
|
||||
fennec_test_run(ivec3(0b0001, 0b0010, 0b0011) & ivec3(0b1000, 0b0100, 0b1100), ivec3(0b0000));
|
||||
fennec_test_run(ivec4(0b0001, 0b0010, 0b0011, 0b0100) & ivec4(0b1000, 0b0100, 0b1100, 0b0010), ivec4(0b0000));
|
||||
fennec_test_run(0b0101 | ivec2(0b0001, 0b0010), ivec2(0b0101, 0b0111));
|
||||
fennec_test_run(0b0101 | ivec3(0b0001, 0b0010, 0b0011), ivec3(0b0101, 0b0111, 0b0111));
|
||||
fennec_test_run(0b0101 | ivec4(0b0001, 0b0010, 0b0011, 0b0100), ivec4(0b0101, 0b0111, 0b0111, 0b0101));
|
||||
|
||||
fennec_test_spacer(1);
|
||||
|
||||
fennec_test_run(([]() -> ivec2 { ivec2 v(0b0001, 0b0010); return v &= ivec2(0b1000, 0b0100); }()), ivec2(0b0000));
|
||||
fennec_test_run(([]() -> ivec3 { ivec3 v(0b0001, 0b0010, 0b0011); return v &= ivec3(0b1000, 0b0100, 0b1100); }()), ivec3(0b0000));
|
||||
fennec_test_run(([]() -> ivec4 { ivec4 v(0b0001, 0b0010, 0b0011, 0b0100); return v &= ivec4(0b1000, 0b0100, 0b1100, 0b0010); }()), ivec4(0b0000));
|
||||
fennec_test_run(ivec2(0b0001, 0b0010) | 0b0101, ivec2(0b0101, 0b0111));
|
||||
fennec_test_run(ivec3(0b0001, 0b0010, 0b0011) | 0b0101, ivec3(0b0101, 0b0111, 0b0111));
|
||||
fennec_test_run(ivec4(0b0001, 0b0010, 0b0011, 0b0100) | 0b0101, ivec4(0b0101, 0b0111, 0b0111, 0b0101));
|
||||
|
||||
fennec_test_spacer(1);
|
||||
|
||||
fennec_test_run(([]() -> ivec2 { ivec2 v(0b0001, 0b0010); return v |= 0b0101; }()), ivec2(0b0101, 0b0111));
|
||||
fennec_test_run(([]() -> ivec3 { ivec3 v(0b0001, 0b0010, 0b0011); return v |= 0b0101; }()), ivec3(0b0101, 0b0111, 0b0111));
|
||||
fennec_test_run(([]() -> ivec4 { ivec4 v(0b0001, 0b0010, 0b0011, 0b0100); return v |= 0b0101; }()), ivec4(0b0101, 0b0111, 0b0111, 0b0101));
|
||||
|
||||
fennec_test_spacer(1);
|
||||
|
||||
fennec_test_run(ivec2(0b0001, 0b0010) | ivec2(0b1000, 0b0100), ivec2(0b1001, 0b0110));
|
||||
fennec_test_run(ivec3(0b0001, 0b0010, 0b0011) | ivec3(0b1000, 0b0100, 0b1100), ivec3(0b1001, 0b0110, 0b1111));
|
||||
fennec_test_run(ivec4(0b0001, 0b0010, 0b0011, 0b0100) | ivec4(0b1000, 0b0100, 0b1100, 0b0010), ivec4(0b1001, 0b0110, 0b1111, 0b0110));
|
||||
|
||||
fennec_test_spacer(1);
|
||||
|
||||
fennec_test_run(([]() -> ivec2 { ivec2 v(0b0001, 0b0010); return v |= ivec2(0b1000, 0b0100); }()), ivec2(0b1001, 0b0110));
|
||||
fennec_test_run(([]() -> ivec3 { ivec3 v(0b0001, 0b0010, 0b0011); return v |= ivec3(0b1000, 0b0100, 0b1100); }()), ivec3(0b1001, 0b0110, 0b1111));
|
||||
fennec_test_run(([]() -> ivec4 { ivec4 v(0b0001, 0b0010, 0b0011, 0b0100); return v |= ivec4(0b1000, 0b0100, 0b1100, 0b0010); }()), ivec4(0b1001, 0b0110, 0b1111, 0b0110));
|
||||
|
||||
|
||||
fennec_test_spacer(2); // bitwise xor ==============================================================================
|
||||
|
||||
|
||||
fennec_test_run(0b0101 ^ ivec2(0b0001, 0b0010), ivec2(0b0100, 0b0111));
|
||||
fennec_test_run(0b0101 ^ ivec3(0b0001, 0b0010, 0b0011), ivec3(0b0100, 0b0111, 0b0110));
|
||||
fennec_test_run(0b0101 ^ ivec4(0b0001, 0b0010, 0b0011, 0b0100), ivec4(0b0100, 0b0111, 0b0110, 0b0001));
|
||||
|
||||
fennec_test_spacer(1);
|
||||
|
||||
fennec_test_run(ivec2(0b0001, 0b0010) ^ 0b0101, ivec2(0b0100, 0b0111));
|
||||
fennec_test_run(ivec3(0b0001, 0b0010, 0b0011) ^ 0b0101, ivec3(0b0100, 0b0111, 0b0110));
|
||||
fennec_test_run(ivec4(0b0001, 0b0010, 0b0011, 0b0100) ^ 0b0101, ivec4(0b0100, 0b0111, 0b0110, 0b0001));
|
||||
|
||||
fennec_test_spacer(1);
|
||||
|
||||
fennec_test_run(([]() -> ivec2 { ivec2 v(0b0001, 0b0010); return v ^= 0b0101; }()), ivec2(0b0100, 0b0111));
|
||||
fennec_test_run(([]() -> ivec3 { ivec3 v(0b0001, 0b0010, 0b0011); return v ^= 0b0101; }()), ivec3(0b0100, 0b0111, 0b0110));
|
||||
fennec_test_run(([]() -> ivec4 { ivec4 v(0b0001, 0b0010, 0b0011, 0b0100); return v ^= 0b0101; }()), ivec4(0b0100, 0b0111, 0b0110, 0b0001));
|
||||
|
||||
fennec_test_spacer(1);
|
||||
|
||||
fennec_test_run(ivec2(0b0001, 0b0010) ^ ivec2(0b1000, 0b0100), ivec2(0b1001, 0b0110));
|
||||
fennec_test_run(ivec3(0b0001, 0b0010, 0b0011) ^ ivec3(0b1000, 0b0100, 0b1100), ivec3(0b1001, 0b0110, 0b1111));
|
||||
fennec_test_run(ivec4(0b0001, 0b0010, 0b0011, 0b0100) ^ ivec4(0b1000, 0b0100, 0b1100, 0b0010), ivec4(0b1001, 0b0110, 0b1111, 0b0110));
|
||||
|
||||
fennec_test_spacer(1);
|
||||
|
||||
fennec_test_run(([]() -> ivec2 { ivec2 v(0b0001, 0b0010); return v ^= ivec2(0b1000, 0b0100); }()), ivec2(0b1001, 0b0110));
|
||||
fennec_test_run(([]() -> ivec3 { ivec3 v(0b0001, 0b0010, 0b0011); return v ^= ivec3(0b1000, 0b0100, 0b1100); }()), ivec3(0b1001, 0b0110, 0b1111));
|
||||
fennec_test_run(([]() -> ivec4 { ivec4 v(0b0001, 0b0010, 0b0011, 0b0100); return v ^= ivec4(0b1000, 0b0100, 0b1100, 0b0010); }()), ivec4(0b1001, 0b0110, 0b1111, 0b0110));
|
||||
|
||||
|
||||
fennec_test_spacer(2); // Left Shift ===============================================================================
|
||||
|
||||
|
||||
fennec_test_run(0x6D40A3C3 << ivec2(4, 8), ivec2(0xD40A3C30, 0x40A3C300));
|
||||
fennec_test_run(0x6D40A3C3 << ivec3(4, 8, 12), ivec3(0xD40A3C30, 0x40A3C300, 0x0A3C3000));
|
||||
fennec_test_run(0x6D40A3C3 << ivec4(4, 8, 12, 16), ivec4(0xD40A3C30, 0x40A3C300, 0x0A3C3000, 0xA3C30000));
|
||||
|
||||
fennec_test_spacer(1);
|
||||
|
||||
fennec_test_run(ivec2(0x1E, 0xF3) << 4, ivec2(0x1E0, 0xF30));
|
||||
fennec_test_run(ivec3(0x1E, 0xF3, 0x27) << 4, ivec3(0x1E0, 0xF30, 0x270));
|
||||
fennec_test_run(ivec4(0x1E, 0xF3, 0x27, 0x7C) << 4, ivec4(0x1E0, 0xF30, 0x270, 0x7C0));
|
||||
|
||||
fennec_test_spacer(1);
|
||||
|
||||
fennec_test_run(([]() -> ivec2 { ivec2 v(0x1E, 0xF3); return v <<= 4; }()), ivec2(0x1E0, 0xF30));
|
||||
fennec_test_run(([]() -> ivec3 { ivec3 v(0x1E, 0xF3, 0x27); return v <<= 4; }()), ivec3(0x1E0, 0xF30, 0x270));
|
||||
fennec_test_run(([]() -> ivec4 { ivec4 v(0x1E, 0xF3, 0x27, 0x7C); return v <<= 4; }()), ivec4(0x1E0, 0xF30, 0x270, 0x7C0));
|
||||
|
||||
fennec_test_spacer(1);
|
||||
|
||||
fennec_test_run(ivec2(0x1E, 0xF3) << ivec2(4, 8), ivec2(0x1E0, 0xF300));
|
||||
fennec_test_run(ivec3(0x1E, 0xF3, 0x27) << ivec3(4, 8, 12), ivec3(0x1E0, 0xF300, 0x27000));
|
||||
fennec_test_run(ivec4(0x1E, 0xF3, 0x27, 0x7C) << ivec4(4, 8, 12, 16), ivec4(0x1E0, 0xF300, 0x27000, 0x7C0000));
|
||||
|
||||
fennec_test_spacer(1);
|
||||
|
||||
fennec_test_run(([]() -> ivec2 { ivec2 v(0x1E, 0xF3); return v <<= ivec2(4, 8); }()), ivec2(0x1E0, 0xF300));
|
||||
fennec_test_run(([]() -> ivec3 { ivec3 v(0x1E, 0xF3, 0x27); return v <<= ivec3(4, 8, 12); }()), ivec3(0x1E0, 0xF300, 0x27000));
|
||||
fennec_test_run(([]() -> ivec4 { ivec4 v(0x1E, 0xF3, 0x27, 0x7C); return v <<= ivec4(4, 8, 12, 16); }()), ivec4(0x1E0, 0xF300, 0x27000, 0x7C0000));
|
||||
|
||||
|
||||
fennec_test_spacer(2); // Right Shift ===============================================================================
|
||||
|
||||
|
||||
fennec_test_run(0x6D40A3C3 >> ivec2(4, 8), ivec2(0x06D40A3C, 0x006D40A3));
|
||||
fennec_test_run(0x6D40A3C3 >> ivec3(4, 8, 12), ivec3(0x06D40A3C, 0x006D40A3, 0x0006D40A));
|
||||
fennec_test_run(0x6D40A3C3 >> ivec4(4, 8, 12, 16), ivec4(0x06D40A3C, 0x006D40A3, 0x0006D40A, 0x00006D40));
|
||||
|
||||
fennec_test_spacer(1);
|
||||
|
||||
fennec_test_run(ivec2(0x1E, 0xF3) >> 4, ivec2(0x1, 0xF));
|
||||
fennec_test_run(ivec3(0x1E, 0xF3, 0x27) >> 4, ivec3(0x1, 0xF, 0x2));
|
||||
fennec_test_run(ivec4(0x1E, 0xF3, 0x27, 0x7C) >> 4, ivec4(0x1, 0xF, 0x2, 0x7));
|
||||
|
||||
fennec_test_spacer(1);
|
||||
|
||||
fennec_test_run(([]() -> ivec2 { ivec2 v(0x1E, 0xF3); return v >>= 4; }()), ivec2(0x1, 0xF));
|
||||
fennec_test_run(([]() -> ivec3 { ivec3 v(0x1E, 0xF3, 0x27); return v >>= 4; }()), ivec3(0x1, 0xF, 0x2));
|
||||
fennec_test_run(([]() -> ivec4 { ivec4 v(0x1E, 0xF3, 0x27, 0x7C); return v >>= 4; }()), ivec4(0x1, 0xF, 0x2, 0x7));
|
||||
|
||||
fennec_test_spacer(1);
|
||||
|
||||
fennec_test_run(ivec2(0x2A1E, 0x7BF3) >> ivec2(4, 8), ivec2(0x2A1, 0x7B));
|
||||
fennec_test_run(ivec3(0x2A1E, 0x7BF3, 0x3927) >> ivec3(4, 8, 12), ivec3(0x2A1, 0x7B, 0x3));
|
||||
fennec_test_run(ivec4(0x2A1E, 0x7BF3, 0x3927, 0x237C) >> ivec4(4, 8, 12, 16), ivec4(0x2A1, 0x7B, 0x3, 0x0));
|
||||
|
||||
fennec_test_spacer(1);
|
||||
|
||||
fennec_test_run(([]() -> ivec2 { ivec2 v(0x2A1E, 0x7BF3); return v >>= ivec2(4, 8); }()), ivec2(0x2A1, 0x7B));
|
||||
fennec_test_run(([]() -> ivec3 { ivec3 v(0x2A1E, 0x7BF3, 0x3927); return v >>= ivec3(4, 8, 12); }()), ivec3(0x2A1, 0x7B, 0x3));
|
||||
fennec_test_run(([]() -> ivec4 { ivec4 v(0x2A1E, 0x7BF3, 0x3927, 0x237C); return v >>= ivec4(4, 8, 12, 16); }()), ivec4(0x2A1, 0x7B, 0x3, 0x0));
|
||||
|
||||
|
||||
}
|
||||
|
||||
Reference in New Issue
Block a user